Hardware architecture for deep learning neuron network and method for image processing
Agris Ņikitenko, Kārlis Berkolds

The invention relates to the electronics, in particular to the electronic systems with multi-processor systems for solving common task. The invention is a hardware architecture for deep learning neuron network comprising multiple general purpose programmable microprocessors and artificial neuron processors which are interconnected forming a multi-layer deep learning hardware neuron network. Each of the layers is composed of a general purpose controlling microprocessor and a neuron network microprocessor forming a unified convolution layer structure, what enables relatively easy to scale up and down the whole system as well as to adapt the controlling software of the controlling microprocessor to address needs of a particular task. Controlling microprocessors can be synchronized forming a data processing conveyer of higher performance, by enabling to process different input data arrays at different convolution layers at the same time. The method for image processing is provided, where hardware architecture for deep learning neuron network is used.

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