Implementation of FPGA Based DSP Module for CW Doppler Radar: Preliminary Results

30th IEEE Norchip 2012 2012
Māris Tērauds

This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.

Keywords
CW radar , Doppler radar , FPGA implementation , road traffic control , scattering centres model , vehicle classification , zero-crossing algorithm
DOI
10.1109/NORCHP.2012.6403117
Hyperlink
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6403117

Tērauds, M. Implementation of FPGA Based DSP Module for CW Doppler Radar: Preliminary Results. In: 30th IEEE Norchip 2012, Denmark, Copenhagen, 12-13 November, 2012. Piscataway: IEEE, 2012, pp.1-6. ISBN 978-1-4673-2221-8. e-ISBN 978-1-4673-2222-5. Available from: doi:10.1109/NORCHP.2012.6403117

Publication language
English (en)