Reliable and precise grid synchronization unit is an essential part of the control system of grid inverters and rectifiers. Typically, such synchronization units are based on three-phase Phase-Locked Loop (PLL), which can be easy implemented in high-end microcontrollers and programmable logic devices (PLDs), and which is more suitable in higher power systems. Obviously, such approach is not applicable to systems of lower power, because they are often single-phase systems and because their control is economically feasible with low-end devices. In such cases synchronization function may be based on easy implementable discrete derivative function as a part of single-phase PLL. There exist several accurate versions of single-phase PLL, where one of d-q components is obtained with: oversampling of measurements, interleaved calculation of derivative and averaged evaluation pulse signals. This paper considers the implementation of these PLL types as a structure based unit - i.e. utilizing a PLD. The experimental study allows to conclude that this kind of PLL implementation is safe and accurate if installed low pass filters (LPFs) operate at high clock. © 2016 IEEE.