An Approach of Feed-Forward Neural Network Throughput-Optimized Implementation in FPGA
Electronics 2020
Rihards Novickis, Daniels Jānis Justs, Kaspars Ozols, Modris Greitāns

Artificial Neural Networks (ANNs) have become an accepted approach for a wide range of challenges. Meanwhile, the advancement of chip manufacturing processes is approaching saturation which calls for new computing solutions. This work presents a novel approach of an FPGA-based accelerator development for fully connected feed-forward neural networks (FFNNs). A specialized tool was developed to facilitate different implementations, which splits FFNN into elementary layers, allocates computational resources and generates high-level C++ description for high-level synthesis (HLS) tools. Various topologies are implemented and benchmarked, and a comparison with related work is provided. The proposed methodology is applied for the implementation of high-throughput virtual sensor.


Keywords
Feed-forward neural networks | FPGA | HLS | Throughput-optimization | Virtual sensors
DOI
10.3390/electronics9122193
Hyperlink
https://www.mdpi.com/2079-9292/9/12/2193

Novickis, R., Justs, D., Ozols, K., Greitāns, M. An Approach of Feed-Forward Neural Network Throughput-Optimized Implementation in FPGA. Electronics, 2020, Vol. 9, No. 12, Article number 2193. ISSN 2079-9292. Available from: doi:10.3390/electronics9122193

Publication language
English (en)
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