Initial Version of Matlab/Simulink Based Tool for VHDL Code Generation and FPGA Implementation of Elementary Generalized Unitary Rotation

NORCHIP 2011: Proceedings of 29th IEEE Norchip Conference 2011
Gatis Valters

This paper describes a Matlab/Simulink GUI based tool for automated FPGA implementation of complex Jacobi-like Elementary Generalized Unitary rotation (EGU-rotation). The present work is targeted on multiplier-adder based rotation algorithm. The developed tool supports a large number of EGU-rotation matrix (EGURM) faces. The Symbolic Math Toolbox is used for operations with formulas. An intensive text processing has been used to get elementary expressions suitable for HDL coding. The tool uses Simulink HDL coder to generate implementable VHDL code. Three kinds of tests and a comparison of results are used. Estimation of rotation quality is based on the mean square error. An interaction between Matlab/Simulink and Altera Quartus II/ModelSim involves the using of scripts.

Atslēgas vārdi
Digital Signal Processing, FPGA, Fixed Point Arithmetic, Jacobi Rotation, Parametrical Transforms, Unitary transforms
DOI
10.1109/NORCHP.2011.6126742
Hipersaite
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6126742

Valters, G. Initial Version of Matlab/Simulink Based Tool for VHDL Code Generation and FPGA Implementation of Elementary Generalized Unitary Rotation. No: NORCHIP 2011: Proceedings of 29th IEEE Norchip Conference, Zviedrija, Lund, 14.-15. novembris, 2011. Piscataway: IEEE, 2011, 1.-6.lpp. ISBN 978-1-4577-0514-4. e-ISBN 978-1-4577-0515-1. Pieejams: doi:10.1109/NORCHP.2011.6126742

Publikācijas valoda
English (en)