Discrete Sequential Implementation of Chaos Oscillators for FPGA Integration

2024 IEEE Workshop on Microwave Theory and Technology in Wireless Communications (MTTW 2024): Proceedings 2024
Ruslans Babajans, Darja Čirjuļina, Deniss Kolosovs

The current work focuses on implementing chaos oscillators in sequential logic form for the field-programmable gate array (FPGA) operation. The paper develops MATLAB models that emulate the dynamics of Vilnius and RC chaos oscillators in fixed-point arithmetic. The developed models are verified by performing Pecora-Carroll synchronization with the oscillator circuits. This study demonstrates that the developed models reflect the performance of chaos oscillators and the possibility of analog-discrete chaotic synchronization.

Atslēgas vārdi
Wireless communication, Chaotic communication, Logic gates, Mathematical models, Numerical models, Synchronization, Integrated circuit modeling, Oscillators, Field programmable gate arrays, Sensor arrays
DOI
10.1109/MTTW64344.2024.10742168
Hipersaite
https://ieeexplore.ieee.org/document/10742168

Babajans, R., Čirjuļina, D., Kolosovs, D. Discrete Sequential Implementation of Chaos Oscillators for FPGA Integration. No: 2024 IEEE Workshop on Microwave Theory and Technology in Wireless Communications (MTTW 2024): Proceedings, Latvija, Riga, 2.-4. oktobris, 2024. Piscataway: IEEE, 2024, 33.-36.lpp. ISBN 979-8-3315-3318-2. e-ISBN 979-8-3315-3317-5. Pieejams: doi:10.1109/MTTW64344.2024.10742168

Publikācijas valoda
English (en)